1. Field
This disclosure relates generally to processor designs and, more specifically, to compressing microcode ROM and to accessing compressed microcode ROM in a processor.
2. Description
Modern microprocessors typically use microcode (stored in microcode ROM (“uROM”)) to emulate legacy instructions, to emulate infrequently executed new functionalities, and to apply functionality patches to an existing design. Using microcode to perform such functions is usually less expensive in terms of die area, power consumption and design cost than using hardware logic. Some processors, especially those new versions what must be compatible with their corresponding predecessors, however, have to support many infrequently executed legacy instructions as well as new functions. As a result, the uROM itself can become fairly big and occupy a significant portion of the total processor core area. For example, the die area of the uROM may approach 20% of the entire die area of those small processing cores targeting the embedded market. In addition, power leakage can also occupy a significant portion of the total power consumption by a processing core. The larger the uROM die area is, the more costly a processor is and the more power leakage the uROM may cause to the processor. Thus, it is desirable to reduce the size of a uROM in a processor.